Articles by tag: ben-eater

FPGA VGA card: Verilog and timings

Create a VGA video card on Altera EP4CE15 FPGA following Ben Eater's lessons. Verilog modules, counters, 2-bit color. Code and timings 800x600@60Hz for middle/senior. Study the implementation.

SAP-1 Assembly in Turing Complete: guide

Step-by-step assembly of SAP-1 computer in Turing Complete simulator. Microcode, ROM, commands. For middle/senior devs. Download files and assemble your own 8-bit CPU.