How processors are designed and manufactured: chip manufacturing

This is the third article in a series on CPU design. In the first article, we examined the architecture of a computer and explained its operation at a high level. The second article talked about the design and implementation of some components of the chip. In the third part, we will learn how architectural designs and electrical circuits become physical chips.

How to turn a heap of sand into a modern processor? Let's figure it out.

Part 1: Computer architecture fundamentals (instruction set architectures, caching, pipelines, hyperthreading)
Part 2: CPU design process (circuitry, transistors, logic elements, synchronization)
Part 3: Chip layout and physical manufacturing (VLSI and silicon fabrication)
Part 4: Current trends and important future directions in computer architecture (sea of ​​accelerators, three-dimensional integration, FPGA, Near Memory Computing)

As mentioned earlier, processors and all other digital logic are composed of transistors. A transistor is an electrically controlled switch that can be turned on and off by applying or disconnecting a gate voltage. We said that there are two types of transistors: nMOS devices pass current when the shutter is on, and pMOS devices pass current when the shutter is off. The basic structure of the processor is transistors made of silicon. Silicon is a semiconductor , because it occupies an intermediate position - it does not conduct current completely, but it is not an insulator.

To turn a silicon wafer into a practical electrical circuit by adding transistors, production engineers use a process called doping . Doping is the process of adding carefully selected impurities to the base silicon substrate to change its conductivity. The goal is to change the behavior of electrons so that we can control them. There are two types of transistors, and therefore, two main types of doping.


The process of manufacturing a plate before placing the chips in the case.

If we add a precisely controlled number of electron donor elements, such as arsenic, antimony or phosphorus, we can create an n-type region. Since the region of the plate on which these elements are deposited now has an excess of electrons, it becomes negatively charged. From here came the name of the type (n - negative) and the letter "n" in nMOS. By adding electron acceptor elements such as boron, indium, or gallium to silicon, we can create a p-type region that is positively charged. From here came the letter “p” in the p-type and pMOS (p - positive). The specific processes for adding these impurities to silicon are called ion implantation and diffusion ; we will not consider them in the article.

Now that we can control the electrical conductivity of the individual parts of the silicon wafer, we can combine the properties of several areas to create transistors. The transistors used in integrated circuits and called MOSFETs (Metal Oxide Semiconductor Field Effect Transistors, MOS structures, metal-oxide-conductor structures) have four connections. The current we control flows between the source and the drain. In an n-channel device, current usually enters the drain and leaves the source, while in a p-channel device it usually flows from the source and leaves the drain. A gate is a switch used to turn a transistor on and off. Finally, the device has a transistor body (Body), which does not apply to the processor, so we will not consider it.


The physical structure of the inverter in silicon. Areas of different colors have different conductivity properties. Note how the different silicon components correspond to the diagram on the right.

Technical details of the operation of transistors and the interaction of individual areas are the contents of the whole college course, so we will only touch on the basics. A good analogy to their work is a drawbridge over a river. Cars - the electrons in the transistor - want to flow from one side of the river to the other, this is the source and drain of the transistor. Take the nMOS device as an example: when the shutter is not charged, the drawbridge is raised and electrons cannot flow through the channel. When we lower the bridge, we form a road over the river and cars can move freely. The same thing happens in the transistor. Charging the gate forms a channel between the source and the drain, allowing current to flow.

For precise control over the location of different p and n regions on silicon, manufacturers such as Intel and TSMC use a process called photolithography . This is an extremely complex multi-stage process and companies spend billions of dollars improving it to create smaller, faster and more energy-efficient transistors. Imagine an ultra-precise printer that you can use to draw silicon patterns for each area.

The process of manufacturing transistors on a chip begins with a clean silicon wafer (substrate). It is heated in an oven to create a thin layer of silicon dioxide on the surface of the plate. Then, a photosensitive photoresistive polymer is applied to silicon dioxide. By illuminating the polymer with light of certain frequencies, we can expose the polymer in those areas where we want to perform alloying. This is a lithography step, and it is similar to how printers apply ink to specific areas of the page, only on a smaller scale.

The plate is etched with hydrofluoric acid to dissolve the silica in the places where the polymer was removed. Then the photoresist is removed, leaving only the oxide layer below it. Now, doping ions can be applied to the plate, which are implanted only in places where oxide is absent.


This process of masking, forming and doping is repeated dozens of times to slowly build each level of elements in a semiconductor. After completing the base silicon level, you can create metallic compounds on top that connect different transistors. A little later we will talk more about these compounds and metallization layers.

Of course, chip manufacturers do not carry out the process of creating transistors under one. When designing a new chip, they generate masks for each stage of the manufacturing process. These masks contain the locations of each element of the billion transistors of the chip. Several chips are grouped together and made together on the same chip.

After manufacturing the plate, it is cut into individual crystals, which are placed
in the case. Each plate may contain hundreds or even more chips. Usually, the more powerful the chip is made, the larger the crystal will be, and the fewer chips the manufacturer can get from each plate.


You might think that we just need to produce huge super-powerful chips with hundreds of cores, but this is impossible. Currently, the most serious factor hindering the creation of ever larger chips is defects in the manufacturing process. Modern chips contain billions of transistors and if at least one part of one transistor is broken, then the entire chip can be thrown. As the size of the processors increases, the probability of a chip malfunction increases.

Companies carefully hide the productivity of the manufacturing processes of their chips, but it can be roughly estimated at 70-90%. Companies usually make chips with a margin because they know that some parts will not work. For example, Intel may design an 8-core chip, but sell it only as a 6-core, because it expects one or two cores to be broken. Unusually low defect chips are usually set aside for sale at a higher price. This process is called binning .

One of the most serious marketing parameters associated with the manufacture of chips is the size of the elements. For example, Intel is mastering a 10-nanometer process, AMD is using a 7-nanometer process for some GPUs, and TSMC has begun work on a 5-nanometer process. But what do all these numbers mean? Traditionally, the size of an element is called the minimum distance between the drain and the source of the transistor. In the process of technology development, we learned to reduce transistors so that more and more of them fit on a single chip. As transistors decrease, they also become faster and faster.

Looking at these numbers, it is important to remember that some companies may not base the size of the manufacturing process on a standard distance, but on other values. This means that processes with different sizes at different companies can actually lead to the creation of transistors of the same size. On the other hand, not all transistors in a separate manufacturing process have the same size. Designers can decide for the sake of compromise to make some transistors larger than others. A small transistor will be faster, because it takes less time to charge and discharge its shutter. However, small transistors can only control a very small number of outputs. If a piece of logic manages something that requires a lot of power, for example, an output pin, then it will have to be done much more. Such output transistors can be orders of magnitude larger


Crystal shot of a modern AMD Zen processor. This design consists of several billion transistors.

However, the design and manufacture of transistors is only half the chip. We need conductors to connect everything according to the scheme. These compounds are created using plating layers on top of transistors. Imagine a multi-level road junction with entrances, exits and a bunch of intersecting roads. This is exactly what happens inside the chip, only on a much smaller scale. Different processors have different amounts of metal bonding layers over transistors. Transistors are reduced, and more and more metallization layers are required to route all signals. It is reported that in the future 5-nanometer TMSC process technology will use 15 layers. Imagine a 15-level vertical road junction - this will give you an idea of ​​how complex routing is inside the chip.

The microscope image below shows a grid formed by seven layers of metallization. Each layer is flat and when it goes up, the layers become larger to help reduce drag. Between the layers there are tiny metal cylinders called jumpers, which are used to move to a higher level. Typically, each layer changes direction relative to the layer below it to reduce unwanted capacitance. Odd metallization layers can be used to create horizontal joints, and even ones for vertical joints.


You can understand that managing all these signals and metallization layers very quickly becomes incredibly complex. To help solve this problem, computer programs are used that automatically position and connect transistors. Depending on the complexity of the design, programs can even translate the functions of a high-level C code down to the physical locations of each conductor and transistor. Typically, chip designers allow computers to generate the bulk of a design automatically, and then study and optimize individual critical parts manually.

When companies want to create a new chip, they begin the design process with the standard cells provided by the chip manufacturer. For example, Intel or TSMC provides designers with such basic parts as logic elements or memory cells. Designers can combine these standard cells into any chip they want to produce. Then they are sent to the factory - a place where raw silicon is converted into working chips - electrical circuits of the chip transistors and metallization layers. These circuits turn into masks, which are used in the manufacturing process described above. Next, we will see how the design process of an extremely simple chip might look like.


First we see the inverter circuit, which is a standard cell. The shaded green rectangle at the top is the pMOS transistor, and the transparent green rectangle at the bottom is the nMOS transistor. The vertical red conductor is a polysilicon gate, the blue areas are metallization 1, and the purple areas are metallization 2. Input A enters on the left and output Y exits on the right. Power and ground connections are made on the top and bottom on metallization 2.


Combining several logical elements, we got a simple 1-bit arithmetic module. This design can add, subtract and perform logical operations with two 1-bit inputs. The shaded blue conductors going up are the metallization layers 3. The slightly larger squares at the ends of the conductors are jumpers connecting the two layers.


Finally, combining many cells and approximately 2,000 transistors together, we got a simple 4-bit processor with 8 bytes of RAM on four metallization layers. Seeing how complicated it is, you can only imagine how difficult it is to design a 64-bit processor with megabytes of cache, several cores, and more than 20 pipeline stages. Given that modern high-performance CPUs have up to 5-10 billion transistors and a dozen metallization layers, it would not be an exaggeration to say that they are literally millions of times more complex than our example.

This makes us understand why the new processor is such an expensive piece of technology and why AMD and Intel have been releasing new products for so long. In order for a new chip to go from a drawing board to the market, it usually takes 3-5 years. This means that the fastest modern chips are based on technologies that are already several years old, and that for many years we will not see chips with a modern level of manufacturing technology.

In the fourth and last article of the series, we will return to the physical sphere and consider current trends in the industry. What are researchers developing to make the next generation of computers even faster?