https://sudonull.com/fpga-vga-card-verilog-and-timings
Create a VGA video card on Altera EP4CE15 FPGA following Ben Eater's lessons. Verilog modules, counters, 2-bit color. Code and timings 800x600@60Hz for middle/senior. Study the implementation.
https://sudonull.com/fpga-vga-card-verilog-and-timings
Create a VGA video card on Altera EP4CE15 FPGA following Ben Eater's lessons. Verilog modules, counters, 2-bit color. Code and timings 800x600@60Hz for middle/senior. Study the implementation.
https://sudonull.com/co-simulation-of-icarus-verilog-and-ngspice-comparison-of-architectures
Analysis of two bridge implementations for mixed simulation. Learn about the fundamental limitations of classical and alternative approaches. Apply in your projects!
https://sudonull.com/usb-controller-on-fpga-development-for-hid-devices-using-the-example-of-a-keyboard
Practical guide to creating a USB 1.1 controller on FPGA. Module architecture, device initialization, analysis of HID descriptors and keyboard connection. Verilog code examples.
https://sudonull.com/multithreaded-risc-v-soft-processor-for-fpga
Implementation of hardware multithreading in RISC-V soft-core: shadow registers, hart_table, CSR. Simplification of IRQ and context switching. Verilog sources for FPGA.
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