Intel PAC with FPGA Stratix 10 SX - an accelerator for large tasks
FPGA Intel Stratix 10 SX / GX , which appeared on sale 2 years ago, became a new word in the field of gate arrays. Made on the minimum at the time 14-nm process technology, they were twice as productive and 70% more efficient than their predecessors. However, to realize all the capabilities of Intel's FPGA, we need the same advanced wrapper. The hardware / software construct released by Intel for using Stratix in host systems is called the Programmable Acceleration Card (PAC) - its latest version was announced in September of this year.
The new PAC is based on the FPGA Intel Stratix 10 SX - the most powerful model from the Stratix 10 family. Let me recall in brief its main characteristics:
- HyperFlex architecture;
- production technology - 14-nm Tri-Gate (FinFET);
- monolithic factory with 5.5 million logical elements;
- up to 96 duplex transceiver channels;
- throughput of transceivers up to 28.3 Gb / s;
- hardware error correction in each channel of the transceiver;
- memory hardware controllers that support DDR4-2666 memory;
- Digital signal processing units (DSP) with total capacity up to 10 TFLOPS, energy efficiency up to 80 GFLOPS / W;
- embedded 4-core 64-bit ARM Cortex-A53 processor with a frequency of up to 1.5 GHz;
- hardware accelerated encryption / decryption of AES-256, SHA-256/384 and ECDSA-256/384;
- hardware support for multi-factor authentication.
As for the Programmable Acceleration Card itself, its functional device is as follows.
The same in more detail as a table.
| Form factor | PCIe Gen3 x16 Full height, 3/4 length, dual slot |
| Memory | 32 GB DDR4 (4x8 GB) ECC |
| Network interfaces | 2X QSFP + up to 100 Gbps |
| Service interface | USB 2.0 for debugging and programming |
| Control controller | Intel MAX 10 FPGA Baseboard Management Management Controller (BMC) • Read temperature and voltage data • Platform Level Data Model (PLDM) • IPMI 2.0 |
| Power management | Intel Enpirion Power Solutions (real-time telemetry and status monitoring) |
| Software | • Acceleration Stack for Intel Xeon CPUs with FPGA • FPGA Interface Manager • Intel Quartus Prime Pro Edition • Intel FPGA SDK for OpenCL |