Intuitive description of processor power states using little men and light bulbs
On any, even complex topic, you can write interestingly, intelligibly and with humor. That is precisely the talent that Intel engineer Taylor Kidd has, who regularly posts articles on the energy-saving states of Intel processors on the company's blog. As a Friday’s positive, we suggest that you familiarize yourself with Taylor’s comic approach to a very serious problem. At the end of the post you will find links to other articles by this author.
This is another post in a series of power management records for Xeon Phi coprocessors. However, everything said here is true for any processor.
Apart from the battered analogy with hares and turtles, I once mentioned “experienced programmers who work diligently for their corporate employers.” Let's expand this concept a bit. At KDPV, we have one experienced programmer. It symbolizes one hardware thread of the CPU coprocessor.
There are 4 hardware threads in the kernel. Take a look at the picture below. Everything is so obvious that I will not bother to write, and you - reading a multi-page explanation. A light bulb is also shown. The light bulb represents the core-supporting infrastructure, such as clock circuits and power circuits.
Experienced programmers in the room, i.e. the core of the Intel Xeon Phi coprocessor
Power Management: C0 and C1 CoresWhat does all this have to do with power management? Sometimes, some liberal liberal arts students say that engineers are imaginative and generally boring. But you and I know that even if some tediousness is sometimes not alien to us, then we cannot be blamed for the lack of imagination. With this in mind, imagine that on each of these tables are computers and table lamps.
Kernel in C0 mode: at least one experienced programmer works hard (i.e., at least one hardware kernel thread executes instructions).
The CPU executes the HALT instruction: when one of our experienced programmers finishes working, it turns off its desk lamp, turns off the computer, and leaves (i.e., one of the hardware threads executes the HALT instruction).
After entering C1 kernel state: when all four experienced programmers complete their work, they all execute HALT instructions. The last of them extinguishes the light in the room. (That is, reducing the core clock speed.)
Power Management: C6 Core StateAfter entering the C6 kernel state: yes, I understand that this is obvious, but I like to talk to myself. Over time, everyone leaves for lunch. Since there is no one in the office, you can turn off even more electrical appliances (i.e., reduce power consumption). However, remember that workers will return after lunch, so you need to be able to quickly turn everything off.
A building full of experienced programmers, i.e. Intel Xeon Phi coprocessor
Power Management: AUTO-C3, DEEP-C3, and C6 Package StatusesYes, this analogy may have fed you, but I like it, so let's continue.
Let's go a little further. Imagine a building with a lot of rooms, more than 60. Look at the picture above. Yes, I know that in Silicon Valley, experienced programmers work in magnificent and spacious rooms, and not in cramped common offices. Unfortunately, this is where my analogy stops, because I just need an ordinary office.
Entering the state of the Auto-C3 package : everyone left the floor, so the motion sensor automatically turns off the lighting on the floor. (That is, the coprocessor control software reduces the operating frequency of the extra-nuclear components and other auxiliary elements of the chip.)
Entering the state of the Deep-C3 package: It’s the weekend, so the whole building (i.e., in the power management module of the MPSS coprocessor driver) has air conditioning turned off and the telephone connection turned off. (That is, the host reduces the voltage of the VccP coprocessor and makes it ignore interruptions)
Entering the state of the C6 package : New Year holidays: the office is closed, all employees voluntarily or forced to rest, therefore the office technical service turned off the electricity, air conditioning, telephones, servers, elevators , toilets, etc. (i.e., the host turned off the power of the coprocessor and turned off PCI Express * traffic monitoring).
Power Management: The Farther, The WonderfulFascinated by our analogy, I decided to expand it to the complexes of office buildings (a node containing several coprocessors), international engineering divisions (clusters in which each node contains several coprocessors) and to attract external partners (distributed processing in the global network). However, common sense won, so I abandoned this plan.
Other Kidd's articles (while in English, but will certainly appear in Russian soon - follow the column on the right):
- Intel Xeon Phi coprocessor Power Management Pt 0: Introduction and inquiring minds
- Intel Xeon Phi coprocessor Power Management Part 1: P-States, Reducing power consumption without impacting performance
- Intel Xeon Phi coprocessor Power Management Part 2a: Core C-States, The Details
- Intel Xeon Phi coprocessor Power Management Part 2b: Package C-States, The Details
- C-States, P-States, where the heck are those T-States?