A bit about the architecture of the ARM7TDMI processor
Recently, I often come across a wide variety of devices running on processors with ARM architecture. In this article I want to start the story about the architecture of ARM7TDMI processors (not to be confused with ARMv7). ARM7TMI is a rather outdated family, but it is still widely used in various embedded devices. Since my work is very closely connected with the development of such devices, I am pretty well oriented in this family. But if someone is interested, I can tell you about newer ARM families.
I must say that ARM is just the architecture on the basis of which many different processors are built. They can have completely different peripherals, different methods of interacting with peripherals, different frequencies and power consumption, but they are united by one thing - the ARM processor core.
ARM7, on the one hand, is quite simple (especially compared to x86), on the other hand, it has more performance and less power consumption. But a smaller set of commands and the fact that the length of the command is fixed leads to an increase in the volume of programs.
I hope that many of those reading this article at least in general know the architecture of x86 :)
How is ARM7 different from x86?
ARM has 32 registers with a length of 32 bits. In fact, only 16 of them are available at a time. The remaining registers are switched along with the processor modes. All registers are completely identical (compare with x86, where even general registers have different properties). True, one of the registers, r15, is used as a program counter, it even has an alias - pc. So it’s obvious that it should not be used as a general-purpose
register :) Another register, r14, is used as a stack pointer and has the alias sp. But no one bothers to use it as a normal working register, if you suddenly do not need a stack. Although this is not recommended.
The third register, r13, by convention, stores the return address from the current function. Exactly like the previous register, it can be used as a working one.
The remaining 13 registers the programmer (though more often the compiler) can use as he wants.
Plus, there are 2 more dedicated processor status registers. In fact, one and the same register, just one and the same register contains the saved data after switching the mode.
The processor can operate in 7 different modes: User, FIQ, IRQ, Supervisor, Abort, System, Undefined. 4 of these modes (FIQ, IRQ, Undefined, Abort) are listened to for processing exceptional operations - handling fast interrupts, handling regular interrupts, trying to execute an unknown instruction, trying to access a non-existent memory area (or an unaligned address). The modes Abort and Undefined allow you to emulate the instructions of the coprocessor and add support for virtual memory, respectively.
The remaining three modes are used to protect the operating system from application programs.
It is curious that all modes (except System) have their own registers r13 and r14. Thus, when switching modes, there is no need to save the values of the top of the stack and the return address.
The processor supports two sets of commands - ARM and Thumb (and the ARM7EJ-S modification also commands for hardware acceleration java). The main difference between ARM and Thumb is the length of the team. In the first case, it is 32 bits, in the other - 16. Thumb programs take up less space on average, but also take longer to execute.
The main differences between ARM commands and x86 are as follows:
There are many more differences, such as the lack of commands for working with floating-point numbers, commands for working with decimal-binary numbers, a ban on accessing unbalanced addresses in memory, DSP and Jazelle extensions, and the absence of input / output ports (all peripherals are mapped to memory), only linear addressing (although with MMU you can switch pages), tricky modifiers of transfer commands to use bit shifts.
In general, if someone is interested, I can tell you more about AWPs, specifically about the AT91SAM7x processor, about embedded development in general and in particular.
general description
I must say that ARM is just the architecture on the basis of which many different processors are built. They can have completely different peripherals, different methods of interacting with peripherals, different frequencies and power consumption, but they are united by one thing - the ARM processor core.
ARM7, on the one hand, is quite simple (especially compared to x86), on the other hand, it has more performance and less power consumption. But a smaller set of commands and the fact that the length of the command is fixed leads to an increase in the volume of programs.
Differences from x86
I hope that many of those reading this article at least in general know the architecture of x86 :)
How is ARM7 different from x86?
Registers
ARM has 32 registers with a length of 32 bits. In fact, only 16 of them are available at a time. The remaining registers are switched along with the processor modes. All registers are completely identical (compare with x86, where even general registers have different properties). True, one of the registers, r15, is used as a program counter, it even has an alias - pc. So it’s obvious that it should not be used as a general-purpose
register :) Another register, r14, is used as a stack pointer and has the alias sp. But no one bothers to use it as a normal working register, if you suddenly do not need a stack. Although this is not recommended.
The third register, r13, by convention, stores the return address from the current function. Exactly like the previous register, it can be used as a working one.
The remaining 13 registers the programmer (though more often the compiler) can use as he wants.
Plus, there are 2 more dedicated processor status registers. In fact, one and the same register, just one and the same register contains the saved data after switching the mode.
Operating modes
The processor can operate in 7 different modes: User, FIQ, IRQ, Supervisor, Abort, System, Undefined. 4 of these modes (FIQ, IRQ, Undefined, Abort) are listened to for processing exceptional operations - handling fast interrupts, handling regular interrupts, trying to execute an unknown instruction, trying to access a non-existent memory area (or an unaligned address). The modes Abort and Undefined allow you to emulate the instructions of the coprocessor and add support for virtual memory, respectively.
The remaining three modes are used to protect the operating system from application programs.
It is curious that all modes (except System) have their own registers r13 and r14. Thus, when switching modes, there is no need to save the values of the top of the stack and the return address.
Instruction set
The processor supports two sets of commands - ARM and Thumb (and the ARM7EJ-S modification also commands for hardware acceleration java). The main difference between ARM and Thumb is the length of the team. In the first case, it is 32 bits, in the other - 16. Thumb programs take up less space on average, but also take longer to execute.
The main differences between ARM commands and x86 are as follows:
- all operations on data occur only in registers. Cannot modify data in memory
- only data transfer commands work with memory. It is possible to transfer data register-memory, memory-register and register-register
- each command has conditional execution modifiers. Those. You can do not only conditional transition, but also for example conditional forwarding or addition.
Other
There are many more differences, such as the lack of commands for working with floating-point numbers, commands for working with decimal-binary numbers, a ban on accessing unbalanced addresses in memory, DSP and Jazelle extensions, and the absence of input / output ports (all peripherals are mapped to memory), only linear addressing (although with MMU you can switch pages), tricky modifiers of transfer commands to use bit shifts.
In general, if someone is interested, I can tell you more about AWPs, specifically about the AT91SAM7x processor, about embedded development in general and in particular.