South Korean Scientists Create Multifunctional Transistor for AI Devices
POSTECH (Pohang University of Science and Technology) team has developed a new type of transistor capable of simultaneously performing multiple logic functions. The technology, published in the journal Advanced Functional Materials, reduces component requirements by 75% and accelerates data processing by 4 times for wearable electronics and AI terminals.
Analytical article: POSTECH's Multifunctional Transistor — Paradigm Shift or Lab Curiosity?
One transistor instead of four, 4x speedup, and a technology that could disrupt the EDA tools market.
On June 9, 2026, Professor Lee Byung Hun's group at POSTECH published a paper in Advanced Functional Materials that made many in the semiconductor industry pause. They created a transistor based on a ZnO-Te heterojunction that exhibits double negative differential transconductance (D-NDT) — a phenomenon where current first rises, then falls, then rises again, and falls again.
At first glance — yet another lab curiosity. But I'll show you why this result could be more dangerous for established players than it seems. And why, despite all the brilliance of the Korean scientists, the path from lab bench to TSMC or Intel fab could take 10 years — or never happen at all.
[The Gist]: What's Really Happening
Forget FinFET, GAA, and 2nm processes for a moment. What POSTECH did is an attack on the fundamental principle of modern microelectronics. For 50 years, we've designed digital circuits on the principle of "one transistor, one logic function." Of course, there are complex gates, flip-flops, multiplexers, but each basic logic element (AND, OR, NOT) is built from several transistors connected in a specific way.
The POSTECH team broke that principle. Their transistor is not just a "transistor with memory" or a "reconfigurable transistor." It's a device that alone can perform a function that would require 4 transistors and complex circuitry in a classic design. We're talking about a frequency quadrupler — a circuit that takes an input signal and outputs a signal with four times the frequency.
How does it work? The key word is D-NDT. In a normal transistor, the current-voltage relationship is a smooth monotonic curve. In their device, this curve has two "humps" and two "valleys." This means that one input signal, passing through the transistor, is "cut" into four different output states. The scientists precisely tuned the overlap length between the ZnO and Te layers — and simultaneously obtained longitudinal and transverse currents within a single crystal.
Why is this important? Because everything gets simpler: 75% fewer components, 4x faster data processing per input signal cycle. And most importantly, low-temperature deposition (<200°C) allows these transistors to be integrated at any stage — even on top of an already finished chip as an additional layer.
Timeline and Context
Professor Lee Byung Hun's team didn't shoot in the dark. Their current success follows a series of breakthroughs throughout 2026, which together paint a picture of not just a research group but a true "incubator" of future technologies.
March 2026: A publication in ACS Nano from the same POSTECH group addresses the contact resistance problem in ultra-thin tellurium transistors. They applied a Raised Source and Drain (RSD) structure — locally thickening the regions where current enters and exits the transistor. Result: contact resistance dropped 50-fold, and on-state current increased 17-fold at cryogenic temperatures. This was a signal: tellurium (Te) could become a serious candidate to replace silicon in 3D integration.
May 2026: A publication in Advanced Functional Materials. This time, it's not about resistance but about the "intelligence" of a single transistor. The paper is dated May 26, but global media only picked it up by June 4-9. Note the timeline: only two months between solving the "conductivity" problem and solving the "functionality" problem. The group is working at an astonishing pace.
Now, June 2026: The news spreads across all industry publications — from Semiconductor Digest to EurekAlert. But as often happens, the scientific sensation is presented as "revolution tomorrow." Yet the real path to commercialization — through manufacturing technology development, scaling, and creating standard cell libraries — will take years. However, the fact that the South Korean government, through the Ministry of Science and ICT, is funding this research (Core Technology Development Program for the National Semiconductor Research Laboratory) speaks volumes. Seoul is betting on post-silicon electronics.
Who Wins and Who Loses
Winner #1: Samsung Electronics (potentially). Samsung and POSTECH have long-standing ties. Moreover, Samsung is actively seeking ways to break away from TSMC not only in process technology but also in architecture. If Samsung can license this technology first and embed D-NDT transistors into its next-generation memory chips or logic for AI accelerators (e.g., the Mach-2 line announced last week), they gain a unique advantage: fewer transistors — more space for cache and memory.
Winner #2: Wearable electronics manufacturers (Apple, Garmin, Huawei). For smartwatches and AR glasses, every square millimeter of die is precious. Reducing component count by 75% means either radically shrinking chip size while maintaining functionality, or — more importantly — adding new features (direct AI inference on the wrist) at the same size. Apple is already testing post-silicon technologies for the next-generation Vision Pro; ZnO-Te transistors could be part of that puzzle.
Winner #3: South Korea's Ministry of Science and ICT. The $39 million for AI-RAN from the Korean government, which we discussed in a previous analysis, is "vertical" integration at the network level. Here, it's a "horizontal" breakthrough at the materials science level. Korea is building a full stack: from fundamental science (POSTECH) to applied solutions (Samsung, SK Hynix). This is a strategy that Europe (IMEC) and the US (Albany NanoTech Complex) are trying to copy, but the Koreans, thanks to tight timelines and strong coordination, are faster.
Loser #1: Synopsys and Cadence (EDA giants). Their business is chip design software based on standard cell libraries. If a transistor appears that performs the function of 4 normal transistors, the rules change. New tools are needed for synthesis, place & route, and static timing analysis (STA). Synopsys and Cadence don't have ready models for D-NDT devices. They'll either have to urgently develop them in-house or buy startups. Likely, within the next 3-6 months, we'll see one of these companies acquire a small French or Israeli startup that was already working on "multifunctional transistors."
Loser #2: Intel (short-term). Intel just landed a massive order from Google for 3 million TPUs; all investor attention is on the 18A process and hyperscaler contracts. But in the long term, Intel could fall into the same trap as Nokia in the iPhone era: they keep "improving what they know" (process technology) while competitors change the very architecture of computing. Intel has no public research on D-NDT transistors, unlike Samsung. That's a warning sign.
Loser #3: TSMC (indirectly). TSMC is the king of silicon lithography. But here we're talking about materials that don't require advanced EUV scanners (ZnO and Te are deposited at low temperatures). If the market shifts toward "functional transistors" rather than just "thinner transistors," TSMC loses some of its technological edge, which rests on massive investments in lithography. This won't happen tomorrow, but the trend is set.
What the Media Isn't Saying
News feeds are republishing the POSTECH press release, adding stock phrases about "breakthrough" and "revolution." But they miss three fundamental problems behind the scenes.
Insight #1: Temperature stability — the main stumbling block
No publication asks: how does this ZnO-Te heterojunction behave at 85°C? At 125°C? In a smartphone chip, temperatures easily reach 80-100°C. In a data center, too. Tellurium and zinc oxide are materials whose properties can change significantly with temperature. The Advanced Functional Materials paper describes experiments at room temperature. Not a word about temperature tests. If the D-NDT effect disappears when heated to 60°C, the commercial application of this technology will be limited to labs and, perhaps, low-power medical implants. Not AI accelerators.
Insight #2: Variability in characteristics — a manufacturer's nightmare
Manufacturing precision is key. D-NDT occurs only at a strictly defined overlap length between ZnO and Te. A deviation of 1-2 nanometers — and instead of a double peak, you get a single peak or none at all. On a 300mm wafer, there could be billions of such transistors. Ensuring nanometer-precision deposition of tellurium on zinc oxide across the entire wafer area is a task no one in the world has accomplished. POSTECH did it in the lab on a few samples. But in a fab, where production speed is hundreds of wafers per hour, repeating this feat will be incredibly difficult. Yield could be unacceptably low — say, 5-10% versus 95% for mature silicon processes.
Insight #3: Tellurium — a rare and expensive material
Reviews mention "availability" and "low-temperature deposition" but omit the main point: tellurium is one of the rarest elements in the Earth's crust. Its abundance is comparable to platinum. Global tellurium production is about 500 tons per year, mainly used in alloys and thermoelectrics. To mass-produce tellurium-based transistors, tellurium mining would need to increase hundreds of times. That's not just expensive — it may be physically impossible at the required scale. Silicon makes up 28% of the Earth's crust. Tellurium: 0.0000001%. Feel the difference. Even if the technology is ready, tellurium will become the new "lithium" for semiconductors — but even more scarce. This means ZnO-Te transistors will remain a niche product for high-margin applications (military chips, medical implants, space), but won't replace silicon in mass-market electronics.
Forecast: Next 30 Days and 90 Days
Next 30 Days (through mid-July 2026)
1. Wave of citations and follow-up research. The Advanced Functional Materials paper will be heavily cited. Within a month, at least 3-4 independent studies from other labs (in the US, Europe, China) will attempt to reproduce the D-NDT effect on other materials (e.g., indium gallium zinc oxide IGZO or molybdenum disulfide MoS2). If at least two groups confirm the result, it's a signal that the phenomenon is not an artifact but a physical effect.
2. Samsung-POSTECH negotiations. Samsung will send a delegation from the Samsung Advanced Institute of Technology (SAIT) to Pohang. Goal: an exclusive licensing agreement. I expect that within 30 days, unconfirmed information (an insider tip from Korean media) will emerge that Samsung is investing $5-10 million in Professor Lee's research group to create a 3D integration prototype using ZnO-Te transistors. This won't be public news, but the industry will know.
3. Venture capital activity in Korea. Deep tech venture funds (e.g., SoftBank Vision Fund, if they're revising their investment strategy in Korea, or local Korean funds like KDB Capital) will start looking for startups working on "multi-valued logic" and "frequency multiplication" with new materials. This is early stage, but I predict at least one Series A deal of $15-20 million by the end of July.
Medium-term Forecast (90 days, through September 2026)
1. First commercial proof-of-concept from Samsung. Samsung will announce (in a closed setting, at the IEDM conference in December, but hints will appear in September) testing of ZnO-Te transistors in 3D packaging for HBM memory. Specifically: using the D-NDT transistor as a frequency quadrupler for the clock signal on the memory die. This could reduce memory interface power consumption by 20-25%. If confirmed, Samsung's stock could rise 5-7% on news of a "breakthrough in HBM energy efficiency."
2. Intel and TSMC reaction — denial or acquisition. Major chipmakers will have to publicly comment on the technology. Likely, they'll say: "It's interesting but immature and has fundamental scalability issues" (which, as we discussed, is true). But behind closed doors, TSMC will start buying up tellurium technology patents, and Intel will accelerate its own research into "2D materials for multifunctional transistors." Expect news that Intel has filed a patent for a "transistor with triple negative differential transconductance" — as a response to D-NDT.
3. First signs of a "materials race." China, which cannot access advanced EUV scanners due to US sanctions, will see ZnO-Te technology as a way to "skip" the silicon lithography stage. The Chinese government will announce a new research program in "post-silicon transistors for AI," focused on tellurium and zinc oxide. The program budget could be $200-300 million over 5 years. This will be a direct response to the POSTECH work.
4. Tellurium supply issues. The global price of tellurium will start rising. Currently around $80-100 per kg. In anticipation of demand from the semiconductor industry, traders will start buying up tellurium, and the price could rise to $150-180 per kg by the end of September. This, in turn, will attract attention from producers in Canada and the US (where tellurium deposits exist as a byproduct of copper and gold mining), and they will begin expanding production. But that's a slow process.
Summary for those who read this far: POSTECH's D-NDT transistor is brilliant scientific work that shows where microelectronics could go after Moore's Law finally hits the physical limits of silicon. But don't be fooled by the headlines. The path from lab prototype to commercial product in semiconductors takes 5-10 years. And on that path, there are three obstacles: thermal stability, variability in characteristics, and tellurium availability. If all three are overcome — we will witness a paradigm shift. If not — this work will remain a beautiful publication that gets cited but not implemented.
For now, I put 70% odds that the technology will find niche applications in military and medical electronics (where cost doesn't matter, but size and power consumption do), and only 30% that it can scale to the mass market of smartphones and AI accelerators. But even that 30% is reason enough for Samsung and the Korean government to invest serious money. Because if it works, it changes everything.
— Editorial Team
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