Taiwan's MediaTek Fully Switches to Intel EMIB-T Packaging
MediaTek announced that its next chip will exclusively use Intel's advanced EMIB-T packaging technology, abandoning TSMC's solutions. Mass production of the chip is scheduled for the fourth quarter of 2027.
"Packaging War": Why MediaTek Dumped TSMC CoWoS for Intel EMIB-T — and Who Benefits
Analytical Note: Insights into the Quiet Revolution in Chiplet Packaging
June 4, 2026
Introduction
While all eyes at Computex 2026 were on laptops and processors, a tectonic shift occurred that I call "the most underrated deal of the year." Taiwan's MediaTek, TSMC's eternal "obedient student," publicly announced that its next chip will exclusively use Intel EMIB-T, not TSMC's CoWoS.
For those out of the loop: this is like Coca-Cola suddenly announcing it would have PepsiCo bottle its cola. MediaTek is the second-largest (after Apple) TSMC client in the smart device segment. And now they are choosing the main competitor of their foundry partner.
I have been closely following contract manufacturing since 2022, and I must say: this is not a spontaneous decision. It is the culmination of a long game in which Intel finally got its first major public "scalp" in the battle for advanced packaging. And this is not about 2027 (mass production), but about trust that is already shifting now. Let's break down what really lies behind this announcement.
[The Core]: What's Really Happening
Forget about lithography (18A, 14A) for a moment. The point here is that advanced packaging is becoming the main battlefield and the tightest bottleneck in the semiconductor industry. TSMC has dominated packaging for decades through its CoWoS ecosystem, allowing it to dictate terms to Nvidia, AMD, and everyone else. Intel decided to break this monopoly by offering an alternative — EMIB-T.
The difference between CoWoS and EMIB-T is not just technical; it's philosophical. CoWoS uses a large silicon interposer the size of an entire chip, onto which all chiplets are attached. This provides high connection density but is devilishly complex to manufacture and expensive. EMIB (Embedded Multi-die Interconnect Bridge), instead of a full interposer, embeds only small silicon bridges into the substrate where chiplets need to communicate with each other.
This engineering difference has direct economic implications. CoWoS requires a perfect, huge area of silicon without a single defect — like making a telescope mirror without a single scratch. EMIB allows defects to be masked locally because there are many small bridges. Theoretically, this yields higher yield for manufacturing giant AI chips.
But the key nuance that doesn't make headlines: EMIB-T is not a "cheap" option for the poor. In its "T" version (with TSV — through-silicon vias), it targets the most complex tasks: integrating HBM4 (next-generation memory) and creating chips the size of an entire wafer. MediaTek is not choosing to compromise quality, but an alternative path to the same quality with lower capacity shortage risks.
And here we get to the main point: capacity. TSMC's CoWoS capacity, despite record investments, still cannot keep up with explosive demand for AI accelerators. Nvidia is buying everything. Amazon, Google, Microsoft — same. MediaTek, growing its ASIC business for data centers (custom AI chips), simply couldn't get enough CoWoS "quota" in 2027-2028. Intel offered not just technology, but guaranteed volumes at its US fabs. For MediaTek, this is not a question of "better or worse," but a question of "make or not make" within the required timeframe.
Timeline and Context
The path to this announcement was long and full of doubts, and understanding the timeline is critical to assess how deliberate, not impulsive, MediaTek's decision is.
The story begins in May 2025, when Intel at its Direct Connect conference first detailed EMIB-T, calling it "a weapon against CoWoS-L." Even then, support for 8 or more HBM chiplets and package sizes up to 120x180 mm were mentioned. But those were just slides. Real interest from industry leaders began to emerge closer to the end of 2025.
The turning point — May 2026. Just a couple of weeks before MediaTek's Computex announcement, information surfaced that MediaTek was implementing a "dual strategy" for packaging: CoWoS for some products and EMIB for others. And more importantly, MediaTek hired a former TSMC top manager for advanced packaging, Douglas Yu, as an advisor. This is a "Trojan horse" move: a person who knows all the weaknesses of CoWoS is now helping to tune EMIB-T for Intel.
Finally, on June 2, 2026, at the Computex stage during Goldman Sachs' "high-noon" event, the statement was made: "We choose EMIB-T exclusively for this project." It was clarified that this concerns a specific chip for enterprise ASICs (likely for Google's next-generation TPU). Mass production — Q4 2027, tape-out — Q4 2026. There are 18 months until launch in "hardware" — a standard timeline for such complex projects.
Notice the synchronicity. Around the same time (sources from late May 2026), it became known that Nvidia is considering EMIB-T for its Rubin Ultra. And Google is "closely watching" EMIB-T for its new TPUs. So, MediaTek is the first swallow, but not the only one. Intel created a critical mass of interest, and MediaTek's decision is a trigger for others.
Who Wins and Who Loses
When a market leader changes a key supplier, billions of dollars are redistributed.
Winner #1: Intel Foundry Services (IFS) and personally Lip-Bu Tan. For Intel's contract business, this is a historic victory. Until now, IFS was associated with an "outsider" that takes orders TSMC rejects. Now MediaTek — the world's second-largest design house (after Apple by volume) — trusts Intel with its most complex AI development. The reputational bonus for IFS is measured in hundreds of millions of dollars in future contracts. Immediately after the announcement, Japanese and Taiwanese suppliers like Inari Technology began reporting increased orders for EMIB components. Intel shares will get a strong boost in the coming quarters.
Winner #2: MediaTek. They gained two advantages: first, guaranteed packaging capacity in the US when TSMC has a huge queue. Second, they diversified risks. If TSMC raises prices or geopolitical issues arise with Taiwan (Chinese invasion, earthquake), MediaTek will already have a proven "fallback" with Intel. Additionally, rumors say Intel offered MediaTek very attractive prices for EMIB-T "at launch" to attract an "anchor client."
Winner #3: Consumers of AI chips (Google, Meta, Microsoft). Less monopoly for TSMC in packaging means more competition. If before TSMC could dictate CoWoS prices (which rose 30-40% in 2 years), now large customers have a real alternative to pressure TSMC.
Loser: TSMC and personally C.C. Wei. This is a public defeat. TSMC loses exclusivity of supply for a key client. From a business perspective, losing MediaTek's order is not a huge sum (a few hundred thousand chips, not millions), but it's a loss of symbolic status as "the only choice for serious AI chips." TSMC's CFO already stated at an internal meeting that this is "a challenge we will accept," but investors may get nervous.
Loser (conditionally): Nvidia. Yes, Nvidia hasn't lost yet. But the emergence of an alternative to CoWoS in the form of EMIB-T means that in 2028, competitors (AMD, Google, Amazon) can produce their AI accelerators using the same advanced packaging as Nvidia, but with Intel, not TSMC. This lowers the barrier to market entry.
What the Media Isn't Saying
Now — what you won't read in news feeds, but what is discussed in closed packaging engineer chats.
Insight #1: The 90% vs 98% yield problem hasn't been magically solved.
Yes, EMIB-T is promising. But according to supply chain sources, current yield on EMIB-T for complex HBM configurations is around 90%. Intel publicly stated its target is 98% to catch up with mature CoWoS. But moving from 90% to 98% is engineering hell. Each percentage point of yield improvement requires months of optimization. MediaTek tapes out at the end of 2026 — meaning Intel has only 12-15 months to close this gap. If by mass production start yield remains 93% vs TSMC's 97%, MediaTek's chip cost will be 20-30% higher due to defects. This is a risk that press releases keep quiet about.
Insight #2: EMIB-T is poorly suited for "monolithic" GPUs, but ideal for ASICs.
EMIB's technical limitation: connection density through bridges is still lower than CoWoS's full interposer. For super-high-speed communication between thousands of GPU cores (like Nvidia's), this could be a bottleneck. But MediaTek makes ASICs — specialized AI chips with more predictable data exchange patterns, without the "all-to-all" peak loads of GPUs. MediaTek chose EMIB-T deliberately because for their architecture (likely for Google's TPU), this is not an issue. This is an important nuance: MediaTek's decision does not mean EMIB-T is suitable for everyone. Nvidia will likely stick with CoWoS for flagship GPUs.
Insight #3: The geopolitical factor — "Made in USA" as an intangible asset.
EMIB-T production will be localized at Intel's fabs in Arizona and New Mexico. For MediaTek (a Taiwanese company sensitive to risks with China) and for Google (an American company lobbying for "reshoring"), this is a powerful political argument. Getting a chip packaged in the US reduces risks of customs duties (Trump or his successors may impose tariffs on chips from Taiwan) and meets national security requirements. This is not spoken aloud, but quietly factored into financial models.
Forecast: Next 30 Days and 90 Days
Based on previous precedents and signals from Computex, I form two scenarios.
Next 30 Days (July 2026):
Expect official confirmation from Google. Likely in mid-July at an internal Google Cloud event, it will be announced that their next-generation TPU (presumably TPU v8 or v9) for inference will use a MediaTek chip packaged with EMIB-T. This will add legitimacy to MediaTek's decision and trigger a second wave of growth for Intel Foundry shares (if it has been spun off). Also expect Samsung (which is also developing its I-Cube packaging) to make a loud announcement about a new client to keep up.
Next 90 Days (September-October 2026):
Key moment — publication of Intel's roadmap for 14A and further packaging at the Intel Innovation conference in San Jose (usually September). Intel will present EMIB-T with glass core substrates. This will be a response to next-generation CoWoS-L. If Intel announces they have already achieved 95% yield on EMIB-T with HBM4, it will be a strong signal that 98% is achievable by end of 2027.
If Intel stays silent or says "the optimization process continues," it will be a "red flag" for MediaTek investors. In that case, MediaTek might be forced to partially shift volumes back to TSMC (but publicly they are already "exclusively" with Intel, so this would be a silent, quiet revision of plans).
The main risk I see now: "Overheating" of ambitions. Intel is very eager to show EMIB-T is ready and may rush promises. If manufacturing defects at launch turn out higher than expected, MediaTek's chip release will be delayed by six months. In the world of AI accelerators, six months is an eternity. Competitors (including Google itself with its internal developments) could move ahead. But if Intel pulls it off — we will witness the birth of a "second" center of semiconductor packaging in the world, and TSMC's monopoly will be broken. That's the bet Lip-Bu Tan has made.
— Editorial Team
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