Circuit training camp for tanks and processors

    In April there was a Rosnanov seminar on modern circuitry for schoolchildren of the olympiad type . After him, a group of organizers gathered in the lobby and puzzled for a long time how to make the subject more interesting and useful at the same time. To enter Verilog and FPGA for example in the format of the NTI Olympics. It was decided to abandon the mathematically interesting, but somewhat abstract for the student tasks such as cache coherence protocols in multiprocessor systems. Also, the idea of ​​an automatic greenhouse with sensors was not very enthusiastic, since it was implemented a hundred times on arduino and STM32, and FPGAs do not add anything interesting to the greenhouses.

    And suddenly - Eureka! And if we hold competitions in graphic games made on pure circuitry, without programming, like our ancestors did games like Pin-Pong in the days of Brezhnev and Carter. And to conduct not on ancient K561 chips, but on modern Xilinx and Altera (that is, Intel FPGA) and using the same design technologies at the level of register transfers that designers use in Apple, Intel and SpaceX.

    In short, we will deal with this on July 8-26 at a summer school in Zelenograd . Part of the school, the plan of which will be discussed in this post, is devoted to the basics of digital circuitry, the first steps in the architecture and microarchitecture of processors, as well as (even rather mostly) hardware computer graphics.

    I’ll try to bring my student daughter Elizabeth to Zelenograd as an assistant if she receives her passport and Russian visa on time. Elizabeth, being Russian-Ukrainian-Japanese, speaks only English. Here in Zelenograd and learn the basics of Russian. And at the same time, I will teach the correct English pronunciation of instructors who are ready to help at school (optionally from MIET, it is possible from MIPT, MSU, MEPhI):



    Today I made one example for the school - the game of tanchi. I took most of the code from an example in the book Designing Video Game Hardware in Verilog by Steven Hugg, December 15, 2018. Stephen Hugg showed the code on some beautiful, but non-industrial simulator. I think that learning on such a simulator is like smelling flowers in a gas mask, so I synthesized the code and poured the resulting configuration into real iron - a cheap Chinese ZEOWAA board . To do this, I had to rewrite the VGA scan generation, make the code more synthesized, and remove some methodological irregularities in the use of clock signals. I posted the result on GitHub .

    Here's what it looks like in Stephen Hugg's simulator:



    Here is how it looks like in my first approximation, after mechanically combining the wrapper for the board, scan generator and Stephen code, as well as fixing any little things that don't work in Intel FPGA Quartus Lite Edition, synthesis and filling:



    But the camp will not only be about games with VGA scan generation, ROM, sprites, etc. We will also cross this with processors. To compare the implementation of games on hardware finite state machines with hardware-software implementation. To do this, we use the schoolMIPS educational processor core, which is described in the posts by Stanislav Zhelnio on Habr and the schoolMIPS wiki on GitHub .

    You can even use the schoolMIPS training core to demonstrate how to design bookmarks in processors. We will not argue whether bookmarks exist in the computer processor on your desk, in your phone or car. We will show how they can be designed. Bookmark example: a hardware state machine monitors the contents of architectural registers during program execution, and when the text “Cloudless Sky Above All Spain” appears in them, switches the processor to privileged mode. The text may come from a user program, such as an email client.

    Is it possible to detect such a bookmark with software antivirus? Not. The software does not see this at all until it happens. Is it possible to detect by examining the microcircuit under an electron microscope? No, there are billions of transistors in an industrial processor, even in arduino - hundreds of thousands. Even if you have the source of the processor in your hands, you can hide a lot in tens-hundreds of thousands or millions of lines on the veril, especially if different parts of the processor fulfill parts of a cleverly thought out plan.

    You can even organize a contest when one team creates a bookmark and the other finds it.



    Any student who has completed three modules of the theoretical online course from RUSNANO with a career-oriented overview of modern methods of designing microcircuits (all this is free and even with the award of prizes) can participate in the summer school in Zelenograd:

    1. From transistor to microcircuit
    2. The logical side of digital circuitry
    3. The physical side of digital circuitry


    Preliminary course program - discussion on it is welcome:

    Week 1. Fundamentals of digital logic.

    Day 1. Microcircuits with a small degree of integration, exercises with combinatorial logic.
    Day 2. Microcircuits with a small degree of integration, exercises with sequential logic.
    Day 3. FPGA, exercises with buttons, switches, LED, seven-segment indicator.
    Day 4. FPGA, output of geometric shapes to VGA.
    Day 5. FPGA, a state machine for playing tanks, races or Angry Birds.

    Week 2. Processor

    Day 1. Programming in assembly language.
    Day 2. One-cycle schoolMIPS processor.
    Day 3. Integration of the processor with the conclusion of geometric shapes on VGA.
    Day 4. Lecture about interruptions and multitasking. Individual project - a video game programmed on the processor with output to VGA.
    Day 5. Lecture about the conveyor. Competition of individual projects.

    Week 3. Programmable radio. The block program consists of three main parts:

    - the basics of electrodynamics and radio wave propagation (theoretical part);
    - The principle of operation of the transceiver path (theory and practice);
    - The basics of digital signal processing - filtering, spectral analysis (theory and practice).

    Day 1. Theoretical foundations of electrodynamics and radio wave propagation. The structural diagram of the transmission path, the functions of the components. Signals (harmonic, rectangular). Signal practice using NI Elvis.
    Day 2. Transferring signals to a high frequency. Mathematical justification for frequency transfer using Matlab. Practical exercise in frequency transfer using NI Datex.
    Day 3. Amplification and emission of signals. Practice using NI Datex. Demonstration of the directivity of the antennas.
    Day 4. Filtering the signal. Practice using NI Datex. Filtering a digital signal in Matlab
    Day 5. Transferring signals to a low frequency. Practice using NI Datex. Summarizing the material covered, summing up.

    By the way, a lot of the materials of Stephen Hugg, from which I look at information about sprites, etc., come from the ancient Texas Instruments TMS9918 video processor, which was located in the Japanese Yamaha MSX computer, which the Gorbachev government imported to computerize Soviet schools. When I was a schoolboy myself, it was not trivial to even manage this video processor from the assembler program running on the main Zilog Z80 processor, and to design this video processor in general. Due to the breakthrough in electronic design automation technology (EDA), this has become possible for modern students, and is even useful for teaching the design of modern chips (Stephen Hugg's book - 2018).

    But for the now gray-haired Soviet schoolchildren - do you remember this game in Yamaha?


    About Electronic Design Automation. In addition to the camp for schoolchildren, here Elizabeth and I are helping to conduct a seminar on similar topics for adults, but not in Zelenograd, but in Las Vegas, at the Design Automation Conference - DAC , and not with educational, but with industrial processors, and not with graphics, and with a coprocessor for AI. Such a seminar is a natural next step for students who will go to school in Zelenograd and then study at MIET, MEPhI, MIPT, HSE MIEM, Moscow State University, ITMO, LETI, SSAU, NSTU and other universities where they teach RTL- microcircuit design route elements to-GDSII, computer architecture and synthesis labs for FPGAs / FPGAs.


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