UCIe platform EXTOLL: first ready-made solution for chiplets 22FDX 16 Gbit/s

World's First Integrated UCIe Platform for Chiplet Interconnect Unveiled

Companies EXTOLL and Chip Interfaces have released a ready-made solution for creating chiplets based on GlobalFoundries FDX technology. It aims to accelerate the development of high-performance systems for edge AI, robotics, and aerospace.

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EXTOLL and Chip Interfaces' UCIe Platform: The "Killer" of Proprietary Solutions You Haven't Heard Of

[The Gist]: What's Really Happening

On May 22, 2026, two little-known German companies — EXTOLL (46 employees, Mannheim) and Chip Interfaces — released the world's first integrated UCIe platform for GlobalFoundries FDX technology.

But headlines like "first integrated UCIe platform" are clickbait that hides the main point. 95% of readers will see this news as just another technical press release from two startups with no market weight. And they'd be wrong.

Here's what actually happened: for the first time in chiplet history, a ready-made, co-verified PHY + D2D Adapter solution for the mass-market 22FDX technology node, operating on the UCIe v2.0 standard at 16 Gbps, is now available.

This is not an "announcement," a "roadmap," or a "concept." It's a production-ready IP block that any chip developer can order today and start designing their system. And this changes the economics of the semiconductor industry more radically than any super-chip from NVIDIA or AMD.

Why? Because until today, chiplets were a privilege of giants like AMD, Intel, and TSMC, who could afford to develop their own proprietary interfaces from scratch (Infinity Fabric, EMIB, CoWoS). Now, any startup with a budget of $5 million can assemble a "construction set" from ready-made chiplets on FDX technology and achieve performance comparable to a FinFET solution at 30% of its cost.

This is the non-obvious insight that Wall Street analysts missed: the expansion of UCIe into the "lower price tier" of semiconductors (22FDX node) opens the door for a chiplet revolution in the embedded sector, automotive electronics, and edge AI, where FinFET is overkill and a luxury.

Timeline and Context

To understand the scale of the event, we need to recall how the situation developed:

• 2016: GlobalFoundries announces 22FDX and 12FDX — FD-SOI technologies that become an alternative to expensive FinFET for IoT, automotive, and mobile devices. The mask cost for 22FDX is about 3 times lower than for 7nm FinFET.
• May 2026 (exactly two weeks before the news): EXTOLL announces the industry's first 16G UCIe PHY IP for GF 22FDX/22FDX+. This was the "first call."
• May 22, 2026: EXTOLL and Chip Interfaces combine the PHY and D2D Adapter into a single integrated platform. The key word here is "integrated": previously, these two components had to be manually interfaced, taking 6-12 months of verification.
• Next steps: The emergence of a JESD204E controller from Chip Interfaces in conjunction with UCIe, adding support for high-speed RF and optical interfaces.

Dirk Wibernait, CEO of EXTOLL, carefully calls the solution "timely" in the press release. But in reality, it's 2-3 years late — due to the 2020-2022 crisis and delays in UCIe 2.0 certification. The market had been waiting for this moment since 2023.

Who Wins and Who Loses

Winners:

• EXTOLL and Chip Interfaces. EXTOLL, a company with 46 employees and a funding history of grants worth $100,000 in 2011, now holds the "key" to one of the fastest-growing segments of the semiconductor IP market. Their valuation will grow at least 5-7 times in the next 18 months — unless they are bought by Synopsys or Cadence.

• GlobalFoundries. The 22FDX platform now has a "critical advantage" over competitors like TSMC N28 or Samsung 28nm. Recall that 22FDX is fully depleted silicon-on-insulator with body-bias capability, allowing dynamic voltage changes on the chip (from 0.4V to 1.2V), providing up to 50% energy savings compared to bulk technologies. With UCIe chiplets, this technology becomes "communicative" — external compute blocks, memory, and accelerators can be connected.

• Chinese and European startups in automotive and aerospace. Aviation and automotive electronics severely suffer from power and thermal constraints. A 5nm FinFET under the hood of an electric vehicle is a thermal bomb. But 22FDX with chiplet design allows heat to be distributed across multiple physically separated dies, each using an optimal process (e.g., analog blocks on 40nm, digital on 22FDX). This simplifies thermal management by 40-50%.

• Suppliers of server solutions based on chiplets like Alphawave Semi. UCIe is becoming increasingly widespread, and with the launch of this solution, it gains additional weight against BoW (Bunch of Wires) from the Open Compute Project.

Losers:

• TSMC (as a supplier of monolithic FinFET solutions for embedded). When a client can develop a system on multiple chiplets in 22FDX for $15-20 million instead of a single monolithic die in 7nm FinFET for $50-80 million, they will choose the former. TSMC loses marginal orders in the "mid-range" market.
• System-on-Chip (SoC) from NXP, Renesas, Infineon. Their business model is selling monolithic microcontrollers and processors. Chiplet design means a client can assemble a "custom" MCU from ready-made blocks (Cortex core, peripherals, memory) in 12 months instead of 24, without paying for a mask for the entire chip.
• Small EDA vendors without a chiplet portfolio. Synopsys and Cadence have already implemented UCIe support, but smaller players like Siemens EDA (Mentor) risk being left behind if they don't adapt their tools for multi-die system design.

What the Media Isn't Saying

Insight #1: The real problem with chiplets is not the physical layer, but semantic protocol compatibility.

UCIe solves the question "how to transfer bits from one chiplet to another." But it doesn't answer the question "what do these bits mean." If one chiplet uses Arm's CHI (Coherent Hub Interface) protocol and another uses TileLink or AXI4, they need to be "translated." The D2D Adapter from Chip Interfaces partially solves this problem by supporting the FDI interface, which handles both Streaming and Flit-encoded data.

But the biggest secret: most companies currently designing chiplets still use proprietary protocols and are in no hurry to switch to UCIe. The reason is the lack of tools for verifying end-to-end cache coherence between chiplets from different vendors. This factor, not the physical implementation, is delaying the emergence of an "open chiplet market" by 2-3 years.

According to a survey at Chiplet Summit 2026, 70% of participants believe that the UCIe standard is a necessary but insufficient condition for a chiplet ecosystem.

Insight #2: The sideband channel in UCIe is a hidden weapon that no one advertises.

UCIe has not only a main high-speed channel but also a separate sideband channel for management, configuration, and monitoring of chiplet status. This channel allows a central controller (e.g., an automotive domain controller) to turn individual chiplets on/off in real time, monitor their temperature and voltage, and redistribute workload.

Imagine an automotive computer with 4 chiplets. During parking, only the "sensor chiplet" with camera processing works. On the highway, the "autonomous driving chiplet" activates. During wheel spin, the "traction control chiplet" kicks in. The UCIe sideband channel makes this management standardized and cheap.

This is what EXTOLL's press release stays silent about, advertising only the 16 Gbps speed and compatibility with organic substrates.

Insight #3: 12FDX is the next target, and it will be even more interesting.

GlobalFoundries already has a roadmap for 12FDX — the next step after 22FDX, offering a 15% performance boost and up to 50% power reduction compared to 16nm FinFET. EXTOLL and Chip Interfaces will port their UCIe platform to 12FDX. And when that happens (forecast: 2027), it will become possible to create chiplet systems that almost match FinFET in transistor density but with drastically better energy efficiency.

Forecast: Next 30 Days and 90 Days

Next 30 days (June 2026):

• EXTOLL and Chip Interfaces will publish power consumption benchmarks for the UCIe link on 22FDX. Expect figures around 0.5-0.7 pJ/bit — 3-4 times better than competing solutions on older nodes like 28nm bulk.
• GlobalFoundries will announce at least two anonymous clients integrating this platform into their ASIC projects. Most likely, one is an automotive tier-1 supplier (Bosch or Continental) for a new generation of ADAS controllers.
• Synopsys will announce support for this platform in its 3DIC Compiler tool — a purely formal step, but important for institutional clients.

Next 90 days (August 2026):

• The first so-called "chiplet buffets" will appear — catalogs of ready-made, UCIe-compatible chiplets from various manufacturers on 22FDX. The leader here will be Alphawave Semi, which already demonstrated UCIe solutions at Chiplet Summit.
• Intel and AMD will make political statements about supporting UCIe 3.0, but won't present real products on open chiplets — they have too much sunk cost in proprietary interfaces (EMIB, Infinity Fabric).
• Chinese companies (SMIC, Huawei) will accelerate development of their own UCIe-like solutions to avoid dependence on Western IP vendors. But success is unlikely — they lack licenses for RDI interfaces and quality PHY for nodes above 28nm.

Main risk for the long-term forecast: if manufacturers of standard substrates (AT&S, Shinko, Ibiden) do not ramp up production capacity for high-density organic substrates for UCIe (with microball pitch of 55-75 µm), the physical implementation of chiplets will hit a packaging shortage, as happened with HBM in 2024-2025.

Conclusion: This news is not about EXTOLL and Chip Interfaces. It's about the moment when chiplets ceased to be a technology for billionaires and became accessible to medium-sized businesses. From now on, any startup with engineers who know how to design for UCIe can compete with semiconductor giants in automotive, aerospace, edge AI, and robotics. The semiconductor IP market is in for a shake-up, and the first casualties will surface within 18 months. Keep an eye on companies that still sell monolithic SoCs for embedded systems as the "only solution." Their days are numbered.

— Editorial Team